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Archive-name: motorola/68k-chips-faq
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Last-modified: 1996/01/06
Version: 22
Frequently Asked Questions (FAQ)
comp.sys.m68k
This list is maintained by:
Robert Boys
San Jose, California
formerly from Ontario, CANADA
Email: r.boys@genie.geis.com
or
rboys@hitex.com
January 6, 1996
this is the 22th list
===========================================================================
===========================================================================
= I am finally updating this FAQ ! I have been quite busy lately. =
= =
= I hope all of you reading this, your family and friends had a =
= wonderful and peaceful Christmas and New Year holiday wherever =
= you may happen to live in the world. I wish that all of you =
= have a continuing prosperous and safe 1996. =
= =
= As you may have noticed in my header - I have moved from the land of =
= ice and snow (Canada) to sunny California. =
= I now work for Hitex Development Tools - aka HiTOOLS Inc. They sell =
= emulators and such. Watch for me at tradeshows =
= =
= VMEbus, M68K and HC11 information may be sent to rboys@hitex.com =
= =
= I have a new Homepage: http://www2.best.com/~rboys (California) =
= The latest version of this FAQ is stored there - i.e. the "work in =
= process" version. I will be getting it running in the next few weeks. =
= This is also true for the FAQ for comp.arch.bus.vmebus =
= My backup Homepage is http://www.sentex.net/~rboys (Canada) =
= =
= This FAQ is also stored on: =
= =
= Canada - http://www.ee.ualberta.ca/archive/m68kfaq.html =
= Germany - http://www.ba-karlsruhe.de/automation/FAQ/m68k =
= California - http://www.hitex.com/automation/FAQ/m68k =
= =
= You can also retrieve the entire set of files (gifs and text) by =
= pointing your Browser (Netscape 1.1n does this) at: =
= =
= http://www.ee.ualberta.ca/archive/m68kfaq.zip =
= http://www.hitex.com/automation/Faq/m68kfaq.zip =
= =
===========================================================================
===========================================================================
The information contained in this FAQ is believed to be correct and up to
date. Every effort has been made to ensure accuracy. The maintainer cannot
be responsible for errors and omissions. Check with a Motorola sales office
to make sure a device is available before designing any products. Products
or services listed here are for information purposes only - they are not
endorsed or recommended. This article is copyright (c) 1995 and all rights
are reserved. This article may be reprinted provided it is intact, proper
credit is given and no cost is levied. Contact the author for permissions.
The various archive locations of this FAQ are now listed under:
G) M68k and VMEbus FAQs Archive sites
What's New! new entries have a ] in the left margin
------------
* There is finally a good 68000 simulator available on the Net for
non-commercial applications. It is called x68k.zip.
ftp://nyquist.ee.ualberta.ca/pub/motorola/m68k/x68k.zip
Alan Clements of the University of Teesside is named M68K Friend
of the Year for contributing this program. It was badly needed.
* Introl is offering a US$150 non-commercial license for their
C compiler - for information see http://www.introl.com or Email
info@introl.com. This is now available for Windows95.
* SDS has a Homepage now. They make the Cross-Code C/C++ compilers.
http://www.sdsi.com
* Applications Update File mailing list. From the Advanced
Microcontroller Division in Texas.
* Some new prices from California
Coming Soon!
* ColdFire information - this will appear on my Homepage first.
* MC68MH360 information
--------------------------------------------------------------------------
CONTENTS:
1) Motorola 16/32 Bit Product Line
A) MC680x0
B) MC68EC0x0 and MC68LC0x0
C) MC68300 series
D) ColdFire
E) Peripheral Chips
F) 8 and 16 bit Processors (HC05, HC11 and the HC16 series)
G) Speed Comparisons
H) PowerPC - MPC601, MPC603, MPC604 series.
I) PowerPC Embedded Controllers
J) Other Manufacturers
K) Interesting places M68K devices are used.
2) Software Sources
A) Free Software Available
B) GNU, NetBSD, LINUX, GCC, RTEMS etc.
C) Commercial Software Available
D) Motorola BBS and AESOP
E) ftp and WWW sites
F) World Wide Web (WWW) links
G) M68k and VMEbus FAQs Archive sites
3) Hardware (board level) Sources
A) Integrated Development Platform (IDP), MEVB, BCC, et al
B) VMEbus modules
C) Indiana University 68030 single board project
D) Consumer computers and Workstations
E) Integrated Circuit Prices
4) Construction Information
5) General Specifications
A) Integrated Circuit Package Information
B) Pin-outs
C) S-Records
D) CPU Clocks and Double-Clocking
E) Big and Little Endians
6) Literature
A) "Specs in Secs"
B) "UPDATE"
C) "The 68K Connection"
D) Master Selection Guide
E) Motorola Addresses
F) Literature Distribution Centres
G) Training and Instructional Books
H) University Support
I) Trade Journals and Magazines
////////////////////////////////////////////////////////////////////////
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1) Motorola 16/32 Bit Product Line:
=====================================
Motorola introduced its first microprocessor in 1974: the 8 bit MC6800 with
an extensive line of support peripherals soon available. The MC68000 was
introduced in 1979 and was soon followed by a host of 16 bit peripheral
chips. The 6800 and 68000 families soon became very popular due to their
straightforward architecture and simple and easy to use bus connections.
The original 6800 evolved into the 6502 (MOS Technology ie Apple ][), 6802,
6805, 6809, HC11 and the HC16 series. Motorola also manufactured an unusual
one (1) bit CPU called the MC14500 Industrial Control Unit (ICU). It is
still listed in their current Master Selection Guide.
The first member of the 68K family - the MC68000, is not software compatible
with the 8 bit 6800 series which includes the 68HC11 series. The 68K family
itself is upwards software compatible. There are no multiplexed pins on the
68000 series. The instruction set is noted for being orthogonal.
The two Motorola divisions of interest here are the High Performance MPU and
the Advanced Micro-Controller Unit (AMCU). The High Performance Group deals
with the MC680x0 series, 68306, 68307, 68322, 68340, 68341 and 68349. The
rest (including 680x, 68HC11, 68HC16) are from the AMCU division except the
68360, 68302 and 68356 which are from the Communications Division.
This FAQ divides the 68K family into three sections - MC680x0, MC68EC0x0 and
the MC68300 series. A short section on 8/16 bit processors follows.
The Motorola integrated circuit product line (almost all of it) has the
prefix of "MC" as in MC68030. 68030 and '030 are short forms of this. A
prefix of "XC" indicates a part not yet fully qualified. A prefix of "SC"
designates a part specially made for a customer. The terms M68K or 68K
represent the 68000 processor line in general as in comp.sys.m68k.
( K = 10^3 or ,000 in scientific circles)
A "*" as in DTACK* signifies the signal is active or true in the low state
if level sensitive or on the presence of a negative edge if edge triggered.
A byte is 8 bits, a word 16 bits and a long word is 32 bits. The prefix "$"
as in $7F or $128 signifies a hexadecimal number.
Motorola was originally the Galvin Mfg. Co in the early thirties. The name
"Motorola" came from the fact that Motorola was once a major player in
automobile radios hence the "motor". Autos were called "motor cars"
("motors" by those who were "hip") in the 1930s. The "ola" is the "derived
2nd element of pianola" according to the Oxford dictionary. Pianola was a
turn-of-the-century machine that played pianos. The "ola" is a suffix used
to form commercial nouns such as used in the music industry ie "Victrola";
just as "tronics" is a suffix commonly used today by electronics firms.
A) MC680x0
------------
The original MC68000 has the following general features:
* CISC - Complex Instruction Set Computer architecture.
* eight 32 bit general purpose data registers (D0-D7).
* eight 32 bit general purpose address registers (A0-A7).
(A7 is the stack pointer - user or supervisor)
* 32 bit Program Counter - linear 4 gigabyte - no paging or segments.
* 16 bit external data bus - needs 16 bit ROM and RAM for system.
Can access 8 or 16 bit memory and peripheral devices.
* 16 Mbyte linear addressing range (23 bit plus Upper* and Lower*
data strobes for an effective 24 bit range), 32 bit with 68020.
* 56 Instruction types - over 1000 useful permutations are possible.
* memory mapped I/O. (peripheral registers addressed as memory).
* 14 addressing modes on a contiguous address space (no segments).
* 5 main data types. (bit, byte, BCD, word and long word).
* Supervisor and User states. Stack Pointer A7 is set to
User (USP) or Supervisor SP (SSP) by a bit in the status register.
* Exception processing and 7 levels of interrupts.
* Tracing function - each instruction ends in a TRAP to user program.
* Asynchronous bus structure. Uses DTACK* from the peripheral chip.
* non-multiplexed address and data buses - interfaces with LS-TTL.
* Bus Arbitration Control circuitry.
* 5 volt NMOS dynamic construction. (the 68HC000 is a CMOS 68000)
The 68HC000 is a CMOS version of the NMOS MC68000.
The 68EC000 is a CMOS version of the 68000 with a switchable (at reset) 8 or
16 bit data bus. It is not a static device - the minimum clock frequency is
4 Mhz. It is designed for the embedded controller market.
Exception processing results from interrupts, TRAP instructions, a bus or
address error or a reset. This feature simplifies software development by
detecting bugs and errors and helps prevent "run-away" conditions. The
Exception Vector table is normally made of 255 32 bit vectors using 1024
bytes of memory starting at location 0. The CPU loads the appropriate
vector, containing the 32 bit address of the routine to service the
exception, from this table at the occurrence of an exception such as reset,
bus or address error, word access to odd memory location, TRAP and others.
This table is usually constructed in RAM by the operating system during the
initialization period. There are 192 user interrupt vectors reserved. The
initial SSP (Supervisor Stack Pointer) and initial PC (for RESET) occupy
memory location $0 and $4 which usually maps out to ROM. The CPU can only
switch from USER mode to the SUPERVISOR mode via exception processing.
The majority of programs are meant to execute in the User Mode. The
Supervisor Mode is used by the operating system to access system resources.
The processor is in the Supervisor Mode at RESET. A system can operate
continuously in the Supervisor Mode.
MC68008:
The 68008 is a MC68000 with a 8 bit data bus in a 48 pin DIP or a 52 pin
PLCC. The RAM, ROM and peripheral chips must have 8 bit data paths. The
DIP package address bus is 20 bits (1 mbyte) and the PLCC device has 22 bits
(4 mbytes). A0 is present on both these parts. The 68008 is listed as "not
recommended for new designs". Other devices such as the MC68HC001, 68EC000
and the 68302 have a switchable (at reset) 8 or 16 bit data bus.
MC68010:
The 68010 is a 68000 with the addition of virtual machine and virtual memory
capabilities and a "loop mode" which acts like a 3 word instruction cache.
This processor is listed as "not for new designs".
A 68010 will plug into a 68000 socket and work in most systems. Three new
registers are added. The Vector Base Register (VBR) determines where in
memory the vector table is located which allows for multiple tables to
implement the virtual machine and memory functions. The Alternate Function
Code Registers (SFC and DFC) allow the Supervisor mode to access user data
space or emulate CPU space cycles. The instruction set is essentially the
same for the 68000/08/10. The 68010 supports modular programming. The
CPU32 processor used in the 68300 series is a 68010 with some 68020
instructions added.
MC68020:
The MC68020 incorporates 32 bit address and data paths and Dynamic Bus
Sizing to "size" peripherals and memory on a cycle-by-cycle basis to 8, 16
or 32 bit lengths using signals supplied by external hardware to the SIZ0-1
pins. The 68020 is software compatible to all earlier 68K members.
A co-processor interface is provided in the instruction set. All virtual
features of the 68010 are preserved. The multiply and divide instructions
use 32 bit operands and branch displacements can be 32 bits. A new data
type, the "quad word" is 64 bits and used in the multiply and divide
instructions. Over 20 new instructions have been added. A 256 byte
instruction cache has been added along with two cache registers (CACR and
CAAR). A Master Stack Pointer (MSP) (32 bits) has been added to facilitate
Multi-Tasking Operating Systems.
MC68030:
The MC68030 is essentially an improved 68020. The MC68030 incorporates a
paged memory management unit (MMU) and 256 byte instruction and data caches
(modified Harvard Architecture). The internal MMU implements most of the
functions of the MC68851 MMU. Two 64 bit, three 32 bit and one 16 bit
registers have been added for MMU control functions. The improved bus
interface supports "burst mode", asynchronous and synchronous memory
accesses as well as dynamic bus sizing support. The Burst Mode fills the
data and instruction caches with bytes from external memory independently
with four accesses in a row. Many functions of the 68030 operate in
parallel increasing throughput. The 68030 can switch between synchronous
and asynchronous modes "on the fly". The '030 is a device useful for new
designs and is available in PGA and surface mount packages up to 50 Mhz.
MC68040:
The MC68040 adds a Floating Point Unit (FPU), separate memory managers for
data and instruction memory and 4 Kbyte data and instruction caches. The
'040 has 32 bit data and address busses with synchronous bus cycles and uses
a full Harvard architecture. The 68040 (as well as the 68060) does not
support dynamic bus sizing as in the '020 and '030. The MC68150 will add
this feature to the '040 and '060. A new instruction, "Move16", has been
added which performs 16 byte block transfers using burst read and writes for
high speed.
The built-in FPU utilizes most of the instructions of the MC68882 FPU. For
a no-cost software package that simulates the unimplemented instructions,
see 040_fpsp under A) Free Software Available. The MC68040 is used in
current high power computer systems.
There is a special companion mode on the MC68360 QUICC to replace the CPU32+
with a MC68EC040 to increase performance of the QUICC. The 360/EC040 pair
reportedly performs at 22 MIPS @ 25 Mhz.
MC68050:
There is no known 68050 part. The rumour on the Net is that since people
were pairing Intel and Motorola processors by part number - ie 6800/8080,
68000/8086, 68010/80186, 68020/80286, 68030/80386 and so on - Motorola
decided to break the pattern and jump from the '040 directly to the '060.
I have never seen any information from Motorola to suggest this story is
true - it is just rumour. It does make appropriate marketing sense.
Signetics once (still?) made a Scc68070 that is similar to the MC68000.
The official word from Motorola is that odd numbered parts represent minor
changes from the previous chip. Even numbers are for major part changes.
Another rumour is that the '050 existed at least on paper but when it was
shown to major customers, this prototype did not fit into their strategic
plans since it was only an improved '040. In view of this, Motorola decided
to skip the '050 and go straight to the '060 which also existed on paper
then and better fit into the strategies of major customers.
MC68060:
This is the latest and most powerful member of the 68K family. The '060 is
designed as an upgrade from a '040 with 2.5 to 3.5 times the performance of
the 25 mhz '040. It uses Superscalar pipelined architecture which means it
can perform more than one instruction at a time. The 68060 allows
simultaneous execution of two integer instructions (or 1 integer and 1 float
instruction) and one branch during each clock cycle. A branch cache allows
most branches to execute in zero cycles. This CPU has some RISC processor
features. The chip is all hardwired - there is no microcode in it. It
incorporates a JTAG interface to help simplify the debugging process.
The on-board caches have been increased to 8 Kbytes each and the '060 has
2.5 million transistors on the single die. The '060 uses various dynamic
power management techniques to reduce power consumption. The '060 has a
clock speed of 50 Mhz currently with a future model at 66 Mhz and since the
'060 is a static device, the clock has no lower limit and can even be
stopped. This part operates at a Vcc of 3.3 volts and interfaces to both 3
and 5 volt peripherals. The input pins can swing between 0 and 5 volts and
the output pins between 0 and 3.3 volts. It has been available as a sample
part for some time now and is probably now entering quantity production.
This may be the last member of the 68K family. The '060 does not support
dynamic bus sizing except with the addition of the MC68150 chip.
The '060 offers 100 MIPS @ 66mhz and 250 million operations per second @ 50
mhz. SPECint = 50 @ 50Mhz. There is a M68060 software package (M68060SP)
that supplies software emulation for unimplemented integer instructions, FPU
software and other library subroutines. This package is available on the
Motorola BBS system and now, AESOP.
Apple Computer has announced it will not use the MC68060 in the Macintosh.
It has switched to the PowerPC RISC chips. The Motorola 68000 series no
longer appears to have a future in the desktop market. The '060 will likely
find application in advanced high power embedded controllers. It has a list
price of $US 308 probably at quantity. (unverified) Motorola claims it will
add peripheral devices to the '060 in the future as it has with its 8 bit
parts. This is possible because the '060 is of a modular design. The '060
is available in a 223 PGA package and will fit into a 179 pin 68040 super-
socket. The extra '060 pins are in towards the center of the socket.
]The '060 is starting to appear in VMEbus computers from such companies as
Motorola, Heurikon, EKF, Synergy (2 '060s!) and others. There are '060
accelerator cards available for the Amiga and a European firm called Escom
will have the Amiga A4000T/060 computer on the market in late October. This
information courtesy of Rask Lambertson in Denmark. It appears the 68K line
will have a long life due to its straight forward architecture, simple bus
interface and ease of machine language programming.
DEVICE TRANSISTORS DEVICE TRANSISTORS
MC68000 68,000 MC68302 320,000
MC68008 70,000 MC68330 235,000
MC68010 84,000 MC68340 350,000
MC68020/EC20 190,000 MC68440 26,000
MC68030 273,000 MC68661 6,000
MC68EC030 251,000 MC68681 9,743
MC68040 1,170,000 MC68881 155,000
MC68EC040 962,000 MC68882 176,000
MC68LC040 813,500 MC68901 9,100
MC68060 2,500,000 MC68230 16,700
MC68322 422,000
PPC601 2,800,000 Alpha AXP 21164 9.3 million
PPC603 1,600,000 MIPS R8000 3,400.000
PPC604 3,600,000
PPC620 7,000,000
Pentium 3,300,000 P6 > 6 million
IntelDX4 1,600,000
---------------------------------------------------------------------------
| Feature | 68000 | 'EC000 | 68010 | 68020 | 68030 | 68040 | 68060 |
---------------------------------------------------------------------------
| Data bus | 16 8/16 16 8/16/32 8/16/32 32 32 |
| Addr bus | 23 23 23 32 32 32 32 |
| Virtual memory | - - Yes Yes Yes Yes Yes |
| Instruct Cache | - - 3 256 256 4096 8192 |
| Data Cache | - - - - 256 4096 8192 |
| Memory manager | <+ (68451 or 68851) +> 68851 Yes Yes Yes |
| FPU interface | - - - 68881 or 68882 Internal FPU |
| built-in FPU | - - - - - Yes Yes |
| Burst Memory | - - - - Yes Yes Yes |
| Bus Cycle type | <++++++++ asynchronous +++++++> both synchronous |
| Data Bus Sizing| - - - Yes Yes use 68150 |
| Power (watts) | 1.2 .13-.26 .13 1.75 2.6 4 - 6 3.9-4.9|
| at frequency of| 8.0 8-16 8 ? ? 25-40 50-66 |
---------------------------------------------------------------------------
NOTES:
a) 68010, 68008, 68451 are apparently no longer available from Motorola.
b) FPU (floating point arithmetic unit) has eight 80 bit registers.
c) MC68008 is a MC68000 with a 8 bit external data path and A0 pin.
d) MC68882 is an enhanced version of the MC68881. Check the appropriate
data sheets for more information and interchangeability.
e) The MC68000/10 external address bus consists of pins A1 to A23. A0 is
an internal signal. Using this scheme, the processor accesses memory
in steps of 16 bits for a maximum total of 8 mwords or 16 mbytes of
memory. The external outputs UPPER* and LOWER* data strobes can be
used to effect byte transfers. See the 68000 data sheet for more
detail. Other 68k series members have a A0 pin. All internal address
registers are 32 bit.
f) MC68060 has a 256 byte entry branch cache. It is also a 3.3 volt part.
g) MC68040V and MC68EC040V are 3.3 volt parts, the rest are 5 volts.
h) MC68HC000 is low power version of the 68000 using HCMOS technology.
i) MC68HC001 is a HC68000 with either a (at reset) 8 or 16 bit data bus.
j) The MC68040V, 68LC040, 68EC040 or 68EC040V do not have a FPU.
k) The MC68HC000 is a CMOS (low power) version of the MC68000.
l) The MC68EC020 is a low cost '020. It has a 24 bit address bus.
m) HCMOS= CMOS combined with HMOS (high density NMOS)
B) MC68EC0x0 and MC68LC0x0
----------------------------
This family is essentially a subset of the MC680x0 product line. It is
designed for low cost embedded controller applications. The major
differences between the two are listed below. Check the appropriate data
sheet for more detailed information.
a) MC68EC000 is a MC68000 with selectable 8 or 16 bit data bus and A0.
b) MC68EC020 is a MC68020 with a 24 bit address bus rather than 32 bits.
c) MC68EC030 is a MC68030 without a paged memory manager (PMMU).
d) MC68LC040 is a MC68040 without a built-in math coprocessor (FPU).
e) MC68EC040 is a MC68040 without a memory manager or built-in FPU.
f) MC68LC060 is a MC68060 without a built-in math coprocessor (FPU)
g) MC68EC060 is a MC68060 without a memory manager or built-in FPU.
External FPUs (MC68881/2) are not easily attached to 68000/08/10, 68EC040
or 68LC040 processors since the co-processor instructions are not present on
these CPUs.
C) MC68300 series
-------------------
This series incorporates various peripherals into various 68K core
processors. They may be called "integrated processors". The core
processors are the 68EC000 and CPU32. The CPU32 is derived from the 68020
processor. The CPU32 has a 16 bit data bus and the extended version
(CPU32+) incorporates a full 32 bit data bus. The CPU32 and CPU32+ have a
built-in background debugging mode (BDM) in the internal microcode.
corrections and additions in the next three charts:
EC000 CPU CORES:
---------------------------------------------------------------------
| Feature | 68302 | 68306 | 68307 | 68322 | 68356 | ? |
---------------------------------------------------------------------
| Core CPU | EC000 EC000 EC000 EC000 EC000 - |
| TPU (timer) | - - - - - - |
| DUART (68681) | - Yes 1/2 see - - |
| DRAM controller| Yes Yes - below Yes - |
| Static Ram | 576 x 2 - - for 1152 - |
| Flash EEPROM | - - - more - - |
| A/D Converter | - - - info - - |
| Serial Ports | 3 Duplex - - - 3+2 - |
| DMA | Yes - ? - Yes - |
| Timer | 3 - 2 - 3 - |
| Parallel Ports | 2 2 bit - 45+8 bits - |
| Chip Selects X | 4 8 4 - 4 - |
| PGA package ? | Yes - ? - - - |
| Clock speed Mhz| 16/20 16 8/16 16/20 25 - |
| 3.3v available?| - - Yes - @20 Mhz - |
| Power (Watts) | .37-.93 |
| at frequency of| 8-20 |
---------------------------------------------------------------------
NOTES:
a) MC68307 has a 8051 8 bit data bus, 8 external interrupts and IIC port
b) MC68302 has a DRAM controller ability using the Communications
Processor main (RISC) controller.
MC68322 (BANDIT): - Uses a EC000 core with a RISC graphics processor (RGP),
a print engine video controller (PVC) and other features. This part is
designed for non-impact printers such as 600 dpi lasers, inkjets and the
fax/modem/printer market.
MC68356: Signal Processing Communication Engine (SPCE): a 68302 and a 56002
(24 bit Digital Signal Processor - (DSP)) in one package. The DSP section
has 5.25K program RAM and 5.5K data RAM (all @ 24 bits). Licensed to use
"TRUESPEECH" speech compression from DSP Group and other DSP56002 code.
Target market includes small modems, wireless communications, cellular and
automobile navigation. Available 4th quarter 1994 @$64.95 (qty > 10,000).
Uses BGA (OMPAC) package. Other features include PCMCIA support and
emulates a 16550 serial port.
There are three new flavours of the MC68302:
MC68LC302 - this part is a low power version. There is one less serial port
(SCC) and the CPU core is static therefore will run down to DC. It will
cost $11.25 (qty = 10k) and will be available 1995.
MC68PM302 - this part has a PCMCIA controller and the same low power
characteristics as the LC. Both the LC and the PM are available in 3.3 and
5 volt version @ 16 and 20 Mhz. $ 17.50 (qty = 10k) and available in 1995.
MC68EN302 - an Ethernet version. This configuration is useful for lo-end
bridge and router markets. It connects to a MC68160 EEST to form a complete
Ethernet connection. It is 5 volt and 20 Mhz only. It will be available
late 1995 for $25 (qty = 10k). The MC68160 EEST is $10 @ 10k.
CPU32 CPU CORES:
---------------------------------------------------------------------------
| Feature | 68330 | 68331 | 68332 | 68F333 | 68334 | 68340 | 68341 |
---------------------------------------------------------------------------
| Core CPU | CPU32 CPU32 CPU32 CPU32 | CPU32 CPU32 CPU32 |
| TPU (timer) | - - Yes Yes | Yes - - |
| DUART (68681) | - - - - | - Yes - |
| DRAM controller| - - - - | - - - |
| Static Ram | - - 2K 4K | 1K - - |
| Flash EEPROM | - - - 64K | - - - |
| A/D Converter | - - - 8/10 bits| 8 ch - - |
| Serial Ports | - 2 2 2 | - 2 ch UART 2 |
| DMA | - - - No | - 2 CH 2 CH |
| Timer | 2 GPT - 1 | - 2 Yes |
| Parallel Ports | 2 - - 18 bits| ? 2 2 |
| Chip Selects X | 4 12 12 9 | ? 4 8 |
| PGA package ? | - - - - | No Yes - |
| Clock speed Mhz| 8/16/25 16/20 20 16 | 16 8/16/25 - |
| 3.3v available?| Yes - - - | - Yes Yes |
| Power (watts) | .63 .6 | .95 |
| at frequency of| 16.78 ? | 16.78 |
---------------------------------------------------------------------------
NOTES:
a) The MC68330 is the lowest cost member of the 68300 family. (maybe)
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